• LDBIO:Computer the effective byte address specified by the sum of rA and the instruction’s signed 16-bit immediate value. Load register rB with the desired memory byte, sign extending the 8-bit value to 32bit. In NIOS II processor cores with a data cache, this instruction may retrieve the desired data from the cache instead of from memory.
• STBIO: Computer the effective byte address specified by the sum of rA and the instruction’s signed 16-bit immediate value. Store the low byte of rB to the memory byte specified by the effective address
Ai bro av thì mình cảm ơn nhiều nha!
• STBIO: Computer the effective byte address specified by the sum of rA and the instruction’s signed 16-bit immediate value. Store the low byte of rB to the memory byte specified by the effective address
Ai bro av thì mình cảm ơn nhiều nha!