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SUBMISSION OF PAPERS: DEADLINE is APRIL 9, 2007 PST
Papers in the Following Areas are Requested:
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Analog Circuit Design:
Amplifiers, voltage references, opamps, sample-and-hold circuits, continuous and discrete-time filters, oversampled and Nyquist-rate data converters, non-linear analog circuits, power supply management ICs, mixed analog/digital IC applications. Analog Circuits for sensor interfaces.
Custom Applications and Power Management:
Analog and digital circuit design emphasizing energy scavenging and power harvesting techniques, solar power, wireless power transmission, RF MEMS, biomedical sensors, micro and anaofluidics chips, & high temperature circuits. Innovative circuits for automotive, biomedical, robotics, and specialized custom and industrial products. Advanced sensor circuits, regulators, IOs, and DC-DC Converters.
Digital Circuits and SoC/ASIC/SiP Designs and Methodology:
Solutions to today's complex digital and mixed-signal design problems, in particular practical examples and case studies involved with systems level design using SoC/ASICs/SiPs ("how we did it"). Multiple power domains with multi-threshold and power shutoff, managing multiple clock to clock domains, managing noise or bridging the digital to analog chasm. Hardware-software tradeoffs, co-design and co-verification, signal integrity challenges and optimizations of all the above including Design-for-Manufacturability.
Simulation and Modeling:
Compact active and passive device models, behavioral modeling, and signal integrity modeling and simulation. System, circuit, functional, timing and logic modeling and simulation. Parasitic extraction and reduction; simulation techniques for analog, RF, and mixed-signal circuits. Package modeling, process variation and statistical modeling.
Embedded Memory:
Memory circuits, architectures, and methodologies addressing scalability, GHz performance, manufacturability, reliability, and the advancement of emerging memory technologies. Also of interest are redundancy, BIST, SER, cell stability, and low voltage/leakage design.
Signal and Data Processing:
General purpose, application specific and configurable data processing architectures, circuits and systems. Digital signal processing for communications and data storage; image processing; speech recognition; multimedia and graphics; encryption and error correction. Special purpose architectures and circuits for novel data processing applications. Digital implementation of previously analog functions.
Sensors, MEMS, and Emerging Technologies:
New and evolving technologies, materials, methodologies, and applications for chip design and development. Examples include nanotechnology, molecular computing, bioelectronic devices, biosensors, CMOS image sensors, OLED's organic and plastic semicondcutors, DNA micro arrays, ultra high speed devices and MEMS, body area netwroks, self assembly technologies, carbon nanotubes, and plastic circuitry and displays.
Manufacturing and Test:
Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non-silicon, and optoelectronics technologies. Special focus on challenges of and alternatives to CMOS scaling. Evolving chip packaging such as chip stacking, lead-free, flip-chip, and System-in-Package. Design for manufacturability/test/reliability, built-in self-test for IC and system, low-cost techniques, design for at-speed test, RF characterization and production test, jitter and high-speed SerDes standards, IEEE 1149.6 boundary scan, hardware and firmware silicon debug and diagnosis, new reliability and failure mechanisms in nanometer technologies, ESD protection, latch-up and soft errors. Tutorial papers on the design impact of process-technology selection or packaging and high-speed serial I/O testing are encouraged.
Wired Communications:
Circuits and systems for electrical and optical networks, including; peripheral IO buses, LAN, WAN, Ethernet, SONET, xDSL, SATA, HDMI, PCIe, USB, cable modems, power-line/phone-line home networks, serial links, backplane, high-speed memory and graphic interfaces, chip-to-chip interconnects, on-chip clocking and high-speed low-power blocks for broadband applications. Circuit blocks including Serializers/Deserializers, Equalizers, PLLs, DLLs, CDRs, Drivers and Amplifiers.
Wireless Designs:
Integrated wireless transceiver architectures and sub-circuits for cellular, connectivity, broadband and millimeter-wave communication, low-power and biomedical, smart antennas and MIMO, software-defined radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.
Programmable Devices:
Logic block, routing fabric, system architecture, and circuit design for FPGAs, PLDs, and structured arrays. Programmable I/O structures, configurable cores, interaction between configurable logic and processors/memories/fixed-function cores. Programmable analog architectures. CAD tools targeting these devices. Power efficient architecture, power modeling and optimization for programmable devices. Architecture and CAD for nano-scale FPGAs.
Submission of Papers: Deadline is April 9, 2007
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Papers must report original and previously unpublished work, including specific results. Papers may be up to 4 pages in length including illustrations, charts, tables and references. Successful submissions concisely explain how the work advances the state of the art and include schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for traditional lecture presentation must include measured experimental results that substantiate performance claims. Circuit-design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentation, but may be considered for poster presentation. Papers are submitted electronically by PDF files. Authors are requested to use the IEEE PDF eXpress program to distill their files in order to meet IEEE Explore requirements. Click on the "Author Kit" button to the left and carefully read and follow the instructions on submtting a paper.
When submitting a paper, please indicate a preference for a lecture presentation or a poster presentation. CICC reserves the right to assign a paper to either category.
Appropriate company and government clearances MUST be obtained prior to submission. Authors of accepted papers will be notified by email by June 8, 2007.
CICC is devoted to showcasing original and previously unpublished technical work. By submitting a paper to CICC, the author agrees that the paper will not be placed in the public domain before the conference. In addition, the content of the paper is not, and will not be, concurrently under consideration for acceptance by another conference. The CICC Technical Committee from time to time monitors submissions to relevant conferences and will reject any paper that is submitted to another conference.
ACCEPTED PAPERS WILL BE PRINTED IN THE PROCEEDINGS WITHOUT OPPORTUNITY FOR FURTHER CHANGE.
Accepted papers will be used for publicity purposes and portions of these papers may be quoted in pre-conference magazine articles and also via the Web. If this is not acceptable, authors must email CICC at cicc@his.com to decline publicity.
Lecture Presentation Papers:
Lecture presentation papers should report original and previously unpublished work, including specific results. Successful submissions consicely explain how the work advances the state of the art and includes schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for lecture presentation must include measured experimental results that substantiate performance claims. Circuit design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentations, but may be considered for poster presentation.
Poster Session Papers:
Poster presentations encourage in-depth discussions with the audience and are ideal for the presentation of ongoing research. The acceptance criteria for papers for poster presentation are identical to those for traditional lecture presentation except that the requirement for measured experiemtnal results may be relaxed.
The submission website is accessed on the Author Kit page. Click here to go to the Author Kit for complete procedures for submitting a paper as well as access to the online submission program.
The deadline for submission of camera-ready papers is April 9, 2007. Your completed submission must be downloaded by 11:59 pm Pacific time on April 9, 2007.
SUBMISSION OF PAPERS: DEADLINE is APRIL 9, 2007 PST
Papers in the Following Areas are Requested:
--------------------------------------------------------------------------------
Analog Circuit Design:
Amplifiers, voltage references, opamps, sample-and-hold circuits, continuous and discrete-time filters, oversampled and Nyquist-rate data converters, non-linear analog circuits, power supply management ICs, mixed analog/digital IC applications. Analog Circuits for sensor interfaces.
Custom Applications and Power Management:
Analog and digital circuit design emphasizing energy scavenging and power harvesting techniques, solar power, wireless power transmission, RF MEMS, biomedical sensors, micro and anaofluidics chips, & high temperature circuits. Innovative circuits for automotive, biomedical, robotics, and specialized custom and industrial products. Advanced sensor circuits, regulators, IOs, and DC-DC Converters.
Digital Circuits and SoC/ASIC/SiP Designs and Methodology:
Solutions to today's complex digital and mixed-signal design problems, in particular practical examples and case studies involved with systems level design using SoC/ASICs/SiPs ("how we did it"). Multiple power domains with multi-threshold and power shutoff, managing multiple clock to clock domains, managing noise or bridging the digital to analog chasm. Hardware-software tradeoffs, co-design and co-verification, signal integrity challenges and optimizations of all the above including Design-for-Manufacturability.
Simulation and Modeling:
Compact active and passive device models, behavioral modeling, and signal integrity modeling and simulation. System, circuit, functional, timing and logic modeling and simulation. Parasitic extraction and reduction; simulation techniques for analog, RF, and mixed-signal circuits. Package modeling, process variation and statistical modeling.
Embedded Memory:
Memory circuits, architectures, and methodologies addressing scalability, GHz performance, manufacturability, reliability, and the advancement of emerging memory technologies. Also of interest are redundancy, BIST, SER, cell stability, and low voltage/leakage design.
Signal and Data Processing:
General purpose, application specific and configurable data processing architectures, circuits and systems. Digital signal processing for communications and data storage; image processing; speech recognition; multimedia and graphics; encryption and error correction. Special purpose architectures and circuits for novel data processing applications. Digital implementation of previously analog functions.
Sensors, MEMS, and Emerging Technologies:
New and evolving technologies, materials, methodologies, and applications for chip design and development. Examples include nanotechnology, molecular computing, bioelectronic devices, biosensors, CMOS image sensors, OLED's organic and plastic semicondcutors, DNA micro arrays, ultra high speed devices and MEMS, body area netwroks, self assembly technologies, carbon nanotubes, and plastic circuitry and displays.
Manufacturing and Test:
Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non-silicon, and optoelectronics technologies. Special focus on challenges of and alternatives to CMOS scaling. Evolving chip packaging such as chip stacking, lead-free, flip-chip, and System-in-Package. Design for manufacturability/test/reliability, built-in self-test for IC and system, low-cost techniques, design for at-speed test, RF characterization and production test, jitter and high-speed SerDes standards, IEEE 1149.6 boundary scan, hardware and firmware silicon debug and diagnosis, new reliability and failure mechanisms in nanometer technologies, ESD protection, latch-up and soft errors. Tutorial papers on the design impact of process-technology selection or packaging and high-speed serial I/O testing are encouraged.
Wired Communications:
Circuits and systems for electrical and optical networks, including; peripheral IO buses, LAN, WAN, Ethernet, SONET, xDSL, SATA, HDMI, PCIe, USB, cable modems, power-line/phone-line home networks, serial links, backplane, high-speed memory and graphic interfaces, chip-to-chip interconnects, on-chip clocking and high-speed low-power blocks for broadband applications. Circuit blocks including Serializers/Deserializers, Equalizers, PLLs, DLLs, CDRs, Drivers and Amplifiers.
Wireless Designs:
Integrated wireless transceiver architectures and sub-circuits for cellular, connectivity, broadband and millimeter-wave communication, low-power and biomedical, smart antennas and MIMO, software-defined radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.
Programmable Devices:
Logic block, routing fabric, system architecture, and circuit design for FPGAs, PLDs, and structured arrays. Programmable I/O structures, configurable cores, interaction between configurable logic and processors/memories/fixed-function cores. Programmable analog architectures. CAD tools targeting these devices. Power efficient architecture, power modeling and optimization for programmable devices. Architecture and CAD for nano-scale FPGAs.
Submission of Papers: Deadline is April 9, 2007
--------------------------------------------------------------------------------
Papers must report original and previously unpublished work, including specific results. Papers may be up to 4 pages in length including illustrations, charts, tables and references. Successful submissions concisely explain how the work advances the state of the art and include schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for traditional lecture presentation must include measured experimental results that substantiate performance claims. Circuit-design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentation, but may be considered for poster presentation. Papers are submitted electronically by PDF files. Authors are requested to use the IEEE PDF eXpress program to distill their files in order to meet IEEE Explore requirements. Click on the "Author Kit" button to the left and carefully read and follow the instructions on submtting a paper.
When submitting a paper, please indicate a preference for a lecture presentation or a poster presentation. CICC reserves the right to assign a paper to either category.
Appropriate company and government clearances MUST be obtained prior to submission. Authors of accepted papers will be notified by email by June 8, 2007.
CICC is devoted to showcasing original and previously unpublished technical work. By submitting a paper to CICC, the author agrees that the paper will not be placed in the public domain before the conference. In addition, the content of the paper is not, and will not be, concurrently under consideration for acceptance by another conference. The CICC Technical Committee from time to time monitors submissions to relevant conferences and will reject any paper that is submitted to another conference.
ACCEPTED PAPERS WILL BE PRINTED IN THE PROCEEDINGS WITHOUT OPPORTUNITY FOR FURTHER CHANGE.
Accepted papers will be used for publicity purposes and portions of these papers may be quoted in pre-conference magazine articles and also via the Web. If this is not acceptable, authors must email CICC at cicc@his.com to decline publicity.
Lecture Presentation Papers:
Lecture presentation papers should report original and previously unpublished work, including specific results. Successful submissions consicely explain how the work advances the state of the art and includes schematics, measured results, and technical detail sufficient to be understood. Circuit-design papers intended for lecture presentation must include measured experimental results that substantiate performance claims. Circuit design papers using only simulation to substantiate performance claims are usually rejected for traditional lecture presentations, but may be considered for poster presentation.
Poster Session Papers:
Poster presentations encourage in-depth discussions with the audience and are ideal for the presentation of ongoing research. The acceptance criteria for papers for poster presentation are identical to those for traditional lecture presentation except that the requirement for measured experiemtnal results may be relaxed.
The submission website is accessed on the Author Kit page. Click here to go to the Author Kit for complete procedures for submitting a paper as well as access to the online submission program.
The deadline for submission of camera-ready papers is April 9, 2007. Your completed submission must be downloaded by 11:59 pm Pacific time on April 9, 2007.
