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unsigned char flash XINCHAO[]={156,136,112,162,72,137,130,40,138,130,47,138,130,232,139,162,40,138,156,40,114,0,0,0};
unsigned char DMem[24]; // Bo nho man hinh, 3 byte dau cho hang 1, 3 byte tiep theo cho hang 2 ...
for (i=0;i<=23;i++){
DMem[i]=~XINCHAO[i];
}
// Timer 1 output compare A interrupt service routine
interrupt [TIM1_COMPA] void timer1_compa_isr(void){
spi(DMem[r*3+2]); //byte thứ 2 ở hàng thứ r
spi(DMem[r*3+1]); // byte thứ 1 ở hàng thứ r
spi(DMem[r*3]); // byte thứ 0 ở hàng thứ r
LatchData();
PORTC=r+8; // để Enable chú 74138
r++;
if (r==8) r=0;
}
6. Hien chu CHAO (giong chuong trinh XINCHAO)
/*****************************************************
This program was produced by the
CodeWizardAVR V1.25.8 Standard
Automatic Program Generator
© Copyright 1998-2007 Pavel Haiduc, HP InfoTech s.r.l.
http://www.hpinfotech.com
Project :
Version :
Date : 7/27/2008
Author : Nguyen Hai Ha
Company : www.softviet.net
Comments:
Chip type : ATmega8515L
Program type : Application
Clock frequency : 16,000000 MHz
Memory model : Small
External SRAM size : 0
Data Stack size : 128
*****************************************************/
#include <mega8515.h>
#include <delay.h>
// SPI functions
#include <spi.h>
#define SCK PORTB.7
#define DATA PORTB.5
#define SCL PORTB.3
#define B PORTC.1;
#define C PORTC.2;
#define OE PORTC.3;
char lenX=9;
char NoLed=3;
unsigned char flash XINCHAO[]={156,136,112,162,72,137,130,40,138,130,47,138,130,232,139,162,40,138,156,40,114,0,0,0};
unsigned char DMem[24]; // Bo nho man hinh, 3 byte dau cho hang 1, 3 byte tiep theo cho hang 2 ...
unsigned char r=0;
unsigned char i;
void LatchData(){
SCL=0;
SCL=1;
}
// Timer 1 output compare A interrupt service routine
interrupt [TIM1_COMPA] void timer1_compa_isr(void){
spi(DMem[r*3+2]);
spi(DMem[r*3+1]);
spi(DMem[r*3]);
LatchData();
PORTC=r+8;
r++;
if (r==8) r=0;
}
void main(void){
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: 15.625 kHz
// Mode: CTC top=OCR1A
// OC1A output: Discon.
// OC1B output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: On
// Compare B Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x0D;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x25; // Quyet dinh toc do quet
OCR1BH=0x00;
OCR1BL=0x00;
DDRB=0xFF;
DDRC=0xFF;
SCL=1;
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=0x40;
// Global enable interrupts
#asm("sei")
// SPI initialization
// SPI Type: Master
// SPI Clock Rate: 4000,000 kHz
// SPI Clock Phase: Cycle Half
// SPI Clock Polarity: Low
// SPI Data Order: MSB First
SPCR=0x50;
SPSR=0x00;
for (i=0;i<=23;i++){
DMem[i]=~XINCHAO[i];
}
while (1){
}
}
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